Enhancing Speedups for FPGA Accelerated SPICE through Frequency Scaling and Precision Reduction

• المؤلفون الرئيسيون: Lim, Hui Hui, Kapre, Nachiket
• مؤلفون آخرون: School of Computer Engineering
• التنسيق: Conference or Workshop Item
• اللغة: English
• منشور في: 2015
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/81238; http://hdl.handle.net/10220/39166
• المؤسسة: Nanyang Technological University

Frequency scaling and precision reduction optimization of an FPGA accelerated SPICE circuit simulator can enhance performance by 1.5x while lowering implementation cost by 15 -- 20%. This is possible due the inherent fault tolerant capabilities of SPICE that can naturally drive simulator convergence...