Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam

Densely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized with Si ion implantation into an SiO2 layer at an implantation energy of 2 keV. In this letter, the memory characteristics of MOSFETs with 7-nm tunnel oxide and 20-nm control oxide at various temperature...

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Main Authors: Ng, Chi Yung, Chen, Tupei, Ding, Liang, Fung, Stevenson Hon Yuen
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2010
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Online Access:https://hdl.handle.net/10356/90762
http://hdl.handle.net/10220/6413
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-907622020-03-07T14:02:39Z Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam Ng, Chi Yung Chen, Tupei Ding, Liang Fung, Stevenson Hon Yuen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Densely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized with Si ion implantation into an SiO2 layer at an implantation energy of 2 keV. In this letter, the memory characteristics of MOSFETs with 7-nm tunnel oxide and 20-nm control oxide at various temperatures have been investigated. A threshold voltage window of ∼ 0.5 V is achieved under write/erase (W/E) voltages of +12 V/-12 V for 1 ms. The devices exhibit good endurance up to 105 W/E cycles even at a high operation temperature of 150°C. They also have good retention characteristics with an extrapolated ten-year memory window of ∼ 0.3 V at 100°C. Published version 2010-09-07T01:54:55Z 2019-12-06T17:53:32Z 2010-09-07T01:54:55Z 2019-12-06T17:53:32Z 2006 2006 Journal Article Ng, C. Y., Chen, T. P., Ding, L., & Fung, S. H. Y. (2006). Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam. IEEE Electron Device Letters, 27(4), 231-233. 0741-3106 https://hdl.handle.net/10356/90762 http://hdl.handle.net/10220/6413 10.1109/LED.2006.871183 en IEEE electron device letters © 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. 3 p. application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Ng, Chi Yung
Chen, Tupei
Ding, Liang
Fung, Stevenson Hon Yuen
Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam
description Densely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized with Si ion implantation into an SiO2 layer at an implantation energy of 2 keV. In this letter, the memory characteristics of MOSFETs with 7-nm tunnel oxide and 20-nm control oxide at various temperatures have been investigated. A threshold voltage window of ∼ 0.5 V is achieved under write/erase (W/E) voltages of +12 V/-12 V for 1 ms. The devices exhibit good endurance up to 105 W/E cycles even at a high operation temperature of 150°C. They also have good retention characteristics with an extrapolated ten-year memory window of ∼ 0.3 V at 100°C.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Ng, Chi Yung
Chen, Tupei
Ding, Liang
Fung, Stevenson Hon Yuen
format Article
author Ng, Chi Yung
Chen, Tupei
Ding, Liang
Fung, Stevenson Hon Yuen
author_sort Ng, Chi Yung
title Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam
title_short Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam
title_full Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam
title_fullStr Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam
title_full_unstemmed Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam
title_sort memory characteristics of mosfets with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam
publishDate 2010
url https://hdl.handle.net/10356/90762
http://hdl.handle.net/10220/6413
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