Design of a low power wide-band high resolution programmable frequency divider
The design of a high-speed wide-band high resolution programmable frequency divider is investigated. A new reloadable D flip-flop for the high speed programmable frequency divider is proposed. It is optimized in terms of propagation delay and power consumption as compared with the existing designs....
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Main Authors: | , , , , |
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Other Authors: | |
Format: | Article |
Language: | English |
Published: |
2009
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/91137 http://hdl.handle.net/10220/4569 |
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Institution: | Nanyang Technological University |
Language: | English |
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