A full current-mode sense amplifier for low-power SRAM applications

• Main Authors: Do, Anh Tuan, Low, Jeremy Yung Shern, Kong, Zhi Hui, Yeo, Kiat Seng, Low, Joshua Yung Lih
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Conference or Workshop Item
• 語言: English
• 出版: 2010
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• 在線閱讀: https://hdl.handle.net/10356/91326; http://hdl.handle.net/10220/6361
• 機構: Nanyang Technological University

A full current-mode sense amplifier is presented. It extensively utilizes the cross-coupled inverters for both local and global sensing stages, hence achieving ultra low-power and ultra high-speed properties simultaneously. Its sensing delay and power consumption are almost independent of the bit- and dataline capacitances. Extensive pre-layout simulation results based on a 1.8 V/0.18 μm CMOS technology from Chartered Semiconductor Manufacturing Ltd. (CHRT) have verified that the new SA outperforms the best published designs with 64% and 45% speed and power consumption improvements respectively. Furthermore, the new design can operate down to a supply voltage of 1 V. These attributes of the proposed SA make it judiciously appropriate for the use in the contemporary highcomplexity systems, which continually crave for low-power and high-speed characteristics.