A CMOS VGA with DC offset cancellation for direct-conversion receivers

A CMOS dB-linear variable gain amplifier (VGA) with a novel I/Q tuning loop for dc-offset cancellation is presented. The CMOS dB-linear VGA provides a variable gain of 60 dB while maintaining its 3-dB bandwi...

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Main Authors: Zheng, Yuanjin, Yan, Jiangnan, Xu, Yong Ping
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2010
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Online Access:https://hdl.handle.net/10356/92153
http://hdl.handle.net/10220/6276
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-921532020-03-07T13:57:25Z A CMOS VGA with DC offset cancellation for direct-conversion receivers Zheng, Yuanjin Yan, Jiangnan Xu, Yong Ping School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering A CMOS dB-linear variable gain amplifier (VGA) with a novel I/Q tuning loop for dc-offset cancellation is presented. The CMOS dB-linear VGA provides a variable gain of 60 dB while maintaining its 3-dB bandwidth greater than 2.5 MHz. A novel exponential circuit is proposed to obtain the dB-linear gain control characteristics. Nonideal effects on dB linearity are analyzed and the methods for improvement are suggested. A varying-bandwidth LPF is employed to achieve fast settling. The chip is fabricated in a 0.35-µm CMOS technology and the measurement results demonstrate the good dB linearity of the proposed VGA and show that the tuning loop can effectively remove dc offset and suppress I/Q mismatch effects simultaneously. Published version 2010-05-10T03:18:39Z 2019-12-06T18:18:21Z 2010-05-10T03:18:39Z 2019-12-06T18:18:21Z 2009 2009 Journal Article Zheng, Y., Yan, J., & Xu, Y.P. (2009). A CMOS VGA with DC Offset Cancellation for Direct-Conversion Receivers. IEEE Transactions on Circuits and Systems—I. 56(1), 103-113. 1549-8328 https://hdl.handle.net/10356/92153 http://hdl.handle.net/10220/6276 10.1109/TCSI.2008.2010592 en IEEE transactions on circuits and systems—I © 2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. 11 p. application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Zheng, Yuanjin
Yan, Jiangnan
Xu, Yong Ping
A CMOS VGA with DC offset cancellation for direct-conversion receivers
description A CMOS dB-linear variable gain amplifier (VGA) with a novel I/Q tuning loop for dc-offset cancellation is presented. The CMOS dB-linear VGA provides a variable gain of 60 dB while maintaining its 3-dB bandwidth greater than 2.5 MHz. A novel exponential circuit is proposed to obtain the dB-linear gain control characteristics. Nonideal effects on dB linearity are analyzed and the methods for improvement are suggested. A varying-bandwidth LPF is employed to achieve fast settling. The chip is fabricated in a 0.35-µm CMOS technology and the measurement results demonstrate the good dB linearity of the proposed VGA and show that the tuning loop can effectively remove dc offset and suppress I/Q mismatch effects simultaneously.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Zheng, Yuanjin
Yan, Jiangnan
Xu, Yong Ping
format Article
author Zheng, Yuanjin
Yan, Jiangnan
Xu, Yong Ping
author_sort Zheng, Yuanjin
title A CMOS VGA with DC offset cancellation for direct-conversion receivers
title_short A CMOS VGA with DC offset cancellation for direct-conversion receivers
title_full A CMOS VGA with DC offset cancellation for direct-conversion receivers
title_fullStr A CMOS VGA with DC offset cancellation for direct-conversion receivers
title_full_unstemmed A CMOS VGA with DC offset cancellation for direct-conversion receivers
title_sort cmos vga with dc offset cancellation for direct-conversion receivers
publishDate 2010
url https://hdl.handle.net/10356/92153
http://hdl.handle.net/10220/6276
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