A 0.8-μW window SAR ADC with offset cancellation for digital DC–DC converters
This letter presents the design of a window successive approximation (SAR) analog-to-digital converter (ADC) using an ultra-fast, offset-cancelled auto-zero comparator for digital DC–DC converters. It is designed in a standard CMOS 0.18 μm process. The ADC has a dynamic reference voltage range to re...
Saved in:
Main Authors: | , , |
---|---|
Other Authors: | |
Format: | Article |
Language: | English |
Published: |
2013
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/98426 http://hdl.handle.net/10220/12409 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |