A 0.8-μW window SAR ADC with offset cancellation for digital DC–DC converters
This letter presents the design of a window successive approximation (SAR) analog-to-digital converter (ADC) using an ultra-fast, offset-cancelled auto-zero comparator for digital DC–DC converters. It is designed in a standard CMOS 0.18 μm process. The ADC has a dynamic reference voltage range to re...
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Main Authors: | , , |
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Other Authors: | |
Format: | Article |
Language: | English |
Published: |
2013
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/98426 http://hdl.handle.net/10220/12409 |
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Institution: | Nanyang Technological University |
Language: | English |
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