Robust intermediate read-out for deep submicron technology CMOS image sensors

• Main Authors: Chen, Shoushun, Farid, Boussaid, Amine, Bermak
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2010
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems
• Online Access: https://hdl.handle.net/10356/93563; http://hdl.handle.net/10220/6335
• Institution: Nanyang Technological University

In this paper, a CMOS image sensor featuring a novel spiking pixel design and a robust digital intermediate read-out is proposed for deep submicron CMOS technologies. The proposed read-out scheme exhibits a relative insensitivity to the ongoing aggressive scaling of the supply voltage. It is based on a novel compact spiking pixel circuit, which combines digitizing and memory functions. Illumination is encoded into a Gray code using a very simple yet robust Gray 8-bit counter memory. Circuit simulations and experiments demonstrate the successful operation of a 64 64 image sensor, implemented in a 0.35 m CMOS technology. A scalability analysis is presented. It suggests that deep sub-0.18 m will enable the full potential of the proposed Gray encoding spiking pixel. Potential applications include multiresolution imaging and motion detection.