Hardware-efficient systolic-like modular design for two-dimensional discrete wavelet transform

• Main Authors: Meher, Pramod Kumar, Mohanty, Basant Kumar, Patra, Jagdish Chandra
• Other Authors: School of Computer Engineering
• Format: Article
• Language: English
• Published: 2011
• Subjects: DRNTU::Engineering::Computer science and engineering::Hardware::Integrated circuits
• Online Access: https://hdl.handle.net/10356/94344; http://hdl.handle.net/10220/7104
• Institution: Nanyang Technological University

A systolic-like modular architecture is presented for hardware-efficient implementation of two-dimensional (2-D) discrete wavelet transform (DWT). The overall computation is decomposed into two distinct stages; where column processing is performed in stage-1, while row processing is performed in sta...