Design of an electronic synapse with spike time dependent plasticity based on resistive memory device

• Main Authors: Hu, S. G., Wu, H. T., Liu, Y., Liu, Z., Yu, Q., Yin, Y., Chen, Tupei, Hosaka, Sumio
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/98141; http://hdl.handle.net/10220/13303
• Institution: Nanyang Technological University

This paper presents a design of electronic synapse with Spike Time Dependent Plasticity (STDP) based on resistive memory device. With the resistive memory device whose resistance can be purposely changed, the weight of the synaptic connection between two neurons can be modified. The synapse can work according to the STDP rule, ensuring that the timing between pre and post-spikes leads to either the long term potentiation or long term depression. By using the synapse, a neural network with three neurons has been constructed to realize the STDP learning.