iDEA : a DSP block based FPGA soft processor
This paper presents a very lean DSP Extension Architecture (iDEA) soft processor for Field Programmable Gate Arrays (FPGAs). iDEA has been built to be as lightweight as possible, utilising the run-time flexibility of the DSP48E1 primitive in Xilinx FPGAs to serve as many processor functions as possi...
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sg-ntu-dr.10356-993662020-05-28T07:17:55Z iDEA : a DSP block based FPGA soft processor Cheah, Hui Yan Fahmy, Suhaib A. Maskell, Douglas L. School of Computer Engineering International Conference on Field-Programmable Technology (2012 : Seoul, Korea) DRNTU::Engineering::Computer science and engineering This paper presents a very lean DSP Extension Architecture (iDEA) soft processor for Field Programmable Gate Arrays (FPGAs). iDEA has been built to be as lightweight as possible, utilising the run-time flexibility of the DSP48E1 primitive in Xilinx FPGAs to serve as many processor functions as possible. We show how the primitive's flexibility can be leveraged within a general-purpose processor, what additional circuitry is needed, and present a full instruction-set architecture. The result is a very compact processor that can run at high speed, while executing a full gamut of general machine instructions. We provide results for a number of simple applications, and show how the processor's resource requirements and frequency compare to a Xilinx MicroBlaze soft core. Based on the DSP48E1, this processor can be deployed across next-generation Xilinx Artix-7, Kintex-7, and Virtex-7 families. 2013-10-04T07:55:44Z 2019-12-06T20:06:29Z 2013-10-04T07:55:44Z 2019-12-06T20:06:29Z 2012 2012 Conference Paper Cheah, H. Y., Fahmy, S. A., & Maskell, D. L. (2012). iDEA: A DSP block based FPGA soft processor. 2012 International Conference on Field-Programmable Technology (FPT), 151 - 158. https://hdl.handle.net/10356/99366 http://hdl.handle.net/10220/16290 10.1109/FPT.2012.6412128 en |
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DRNTU::Engineering::Computer science and engineering Cheah, Hui Yan Fahmy, Suhaib A. Maskell, Douglas L. iDEA : a DSP block based FPGA soft processor |
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This paper presents a very lean DSP Extension Architecture (iDEA) soft processor for Field Programmable Gate Arrays (FPGAs). iDEA has been built to be as lightweight as possible, utilising the run-time flexibility of the DSP48E1 primitive in Xilinx FPGAs to serve as many processor functions as possible. We show how the primitive's flexibility can be leveraged within a general-purpose processor, what additional circuitry is needed, and present a full instruction-set architecture. The result is a very compact processor that can run at high speed, while executing a full gamut of general machine instructions. We provide results for a number of simple applications, and show how the processor's resource requirements and frequency compare to a Xilinx MicroBlaze soft core. Based on the DSP48E1, this processor can be deployed across next-generation Xilinx Artix-7, Kintex-7, and Virtex-7 families. |
author2 |
School of Computer Engineering |
author_facet |
School of Computer Engineering Cheah, Hui Yan Fahmy, Suhaib A. Maskell, Douglas L. |
format |
Conference or Workshop Item |
author |
Cheah, Hui Yan Fahmy, Suhaib A. Maskell, Douglas L. |
author_sort |
Cheah, Hui Yan |
title |
iDEA : a DSP block based FPGA soft processor |
title_short |
iDEA : a DSP block based FPGA soft processor |
title_full |
iDEA : a DSP block based FPGA soft processor |
title_fullStr |
iDEA : a DSP block based FPGA soft processor |
title_full_unstemmed |
iDEA : a DSP block based FPGA soft processor |
title_sort |
idea : a dsp block based fpga soft processor |
publishDate |
2013 |
url |
https://hdl.handle.net/10356/99366 http://hdl.handle.net/10220/16290 |
_version_ |
1681059479899078656 |