SRAM-based NATURE: A dynamically reconfigurable FPGA based on 10T low-power SRAMs

• Main Authors: Jha, Niraj K., Lin, Ting-Jung, Zhang, Wei
• 其他作者: School of Computer Engineering
• 格式: Article
• 語言: English
• 出版: 2013
• 主題: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design
• 在線閱讀: https://hdl.handle.net/10356/99851; http://hdl.handle.net/10220/16544

We presented a hybrid CMOS/nanotechnology reconfigurable architecture (NATURE), earlier. It was based on CMOS logic and nano RAMs. It used the concept of temporal logic folding and fine-grain (e.g., cycle-level) dynamic reconfiguration to increase logic density by an order of magnitude. This dynamic...