SRAM-based NATURE: A dynamically reconfigurable FPGA based on 10T low-power SRAMs
We presented a hybrid CMOS/nanotechnology reconfigurable architecture (NATURE), earlier. It was based on CMOS logic and nano RAMs. It used the concept of temporal logic folding and fine-grain (e.g., cycle-level) dynamic reconfiguration to increase logic density by an order of magnitude. This dynamic...
Saved in:
Main Authors: | Jha, Niraj K., Lin, Ting-Jung, Zhang, Wei |
---|---|
Other Authors: | School of Computer Engineering |
Format: | Article |
Language: | English |
Published: |
2013
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/99851 http://hdl.handle.net/10220/16544 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Ultra-low power SRAM and SRAM based PUF design
by: Lu, Lu
Published: (2019) -
Low power design for SRAM
by: Chen, Jiahuan
Published: (2019) -
Low power SRAM-based computing-in-memory design
by: Wang, Shuqi
Published: (2023) -
Low-power and robust SRAM design
by: Chen, Junchao.
Published: (2013) -
Low power SRAM-PUF with improved reliability & uniformity utilizing aging impact for security improvement
by: Garg, Achiranshu
Published: (2014)