Si nanowire CMOS transistors and circuits by top-down technology approach

10.1149/1.2911501

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Bibliographic Details
Main Authors:	Balasubramanian, N., Singh, N., Rustogi, S.C., Buddharaju, K.D., Fu, J., Hui, Z., Balakumar, S., Agarwal, A., Manhas, S.K., Lo, G.Q., Kwong, D.L.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2016
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/130092
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-130092
record_format	dspace
spelling	sg-nus-scholar.10635-1300922024-11-14T02:35:24Z Si nanowire CMOS transistors and circuits by top-down technology approach Balasubramanian, N. Singh, N. Rustogi, S.C. Buddharaju, K.D. Fu, J. Hui, Z. Balakumar, S. Agarwal, A. Manhas, S.K. Lo, G.Q. Kwong, D.L. ELECTRICAL & COMPUTER ENGINEERING 10.1149/1.2911501 ECS Transactions 13 1 201-211 2016-11-11T08:00:51Z 2016-11-11T08:00:51Z 2008 Conference Paper Balasubramanian, N., Singh, N., Rustogi, S.C., Buddharaju, K.D., Fu, J., Hui, Z., Balakumar, S., Agarwal, A., Manhas, S.K., Lo, G.Q., Kwong, D.L. (2008). Si nanowire CMOS transistors and circuits by top-down technology approach. ECS Transactions 13 (1) : 201-211. ScholarBank@NUS Repository. <a href="https://doi.org/10.1149/1.2911501" target="_blank">https://doi.org/10.1149/1.2911501</a> 9781566776264 19385862 http://scholarbank.nus.edu.sg/handle/10635/130092 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	10.1149/1.2911501
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Balasubramanian, N. Singh, N. Rustogi, S.C. Buddharaju, K.D. Fu, J. Hui, Z. Balakumar, S. Agarwal, A. Manhas, S.K. Lo, G.Q. Kwong, D.L.
format	Conference or Workshop Item
author	Balasubramanian, N. Singh, N. Rustogi, S.C. Buddharaju, K.D. Fu, J. Hui, Z. Balakumar, S. Agarwal, A. Manhas, S.K. Lo, G.Q. Kwong, D.L.
spellingShingle	Balasubramanian, N. Singh, N. Rustogi, S.C. Buddharaju, K.D. Fu, J. Hui, Z. Balakumar, S. Agarwal, A. Manhas, S.K. Lo, G.Q. Kwong, D.L. Si nanowire CMOS transistors and circuits by top-down technology approach
author_sort	Balasubramanian, N.
title	Si nanowire CMOS transistors and circuits by top-down technology approach
title_short	Si nanowire CMOS transistors and circuits by top-down technology approach
title_full	Si nanowire CMOS transistors and circuits by top-down technology approach
title_fullStr	Si nanowire CMOS transistors and circuits by top-down technology approach
title_full_unstemmed	Si nanowire CMOS transistors and circuits by top-down technology approach
title_sort	si nanowire cmos transistors and circuits by top-down technology approach
publishDate	2016
url	http://scholarbank.nus.edu.sg/handle/10635/130092
_version_	1821233534125211648

Si nanowire CMOS transistors and circuits by top-down technology approach

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