Advanced gate stack for sub-0.1 (mu)m CMOS technology

Ph.D

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Bibliographic Details
Main Author:	YU HONGYU
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Theses and Dissertations
Language:	English
Published:	2010
Subjects:	CMOS, high-K, metal-gate, tunneling-curent
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/14353
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Institution:	National University of Singapore
Language:	English

id	sg-nus-scholar.10635-14353
record_format	dspace
spelling	sg-nus-scholar.10635-143532015-01-09T09:00:10Z Advanced gate stack for sub-0.1 (mu)m CMOS technology YU HONGYU ELECTRICAL & COMPUTER ENGINEERING LI MING-FU KWONG, DIM-LEE CMOS, high-K, metal-gate, tunneling-curent Ph.D DOCTOR OF PHILOSOPHY 2010-04-08T10:42:20Z 2010-04-08T10:42:20Z 2005-02-28 Thesis YU HONGYU (2005-02-28). Advanced gate stack for sub-0.1 (mu)m CMOS technology. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/14353 NOT_IN_WOS en
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
language	English
topic	CMOS, high-K, metal-gate, tunneling-curent
spellingShingle	CMOS, high-K, metal-gate, tunneling-curent YU HONGYU Advanced gate stack for sub-0.1 (mu)m CMOS technology
description	Ph.D
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING YU HONGYU
format	Theses and Dissertations
author	YU HONGYU
author_sort	YU HONGYU
title	Advanced gate stack for sub-0.1 (mu)m CMOS technology
title_short	Advanced gate stack for sub-0.1 (mu)m CMOS technology
title_full	Advanced gate stack for sub-0.1 (mu)m CMOS technology
title_fullStr	Advanced gate stack for sub-0.1 (mu)m CMOS technology
title_full_unstemmed	Advanced gate stack for sub-0.1 (mu)m CMOS technology
title_sort	advanced gate stack for sub-0.1 (mu)m cmos technology
publishDate	2010
url	http://scholarbank.nus.edu.sg/handle/10635/14353
_version_	1681079012760223744

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