Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers

10.1109/BTAS.2007.4401930

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Bibliographic Details
Main Authors:	Lai H.-C., Savvides M., Chen T.
Other Authors:	OFFICE OF THE PROVOST
Format:	Conference or Workshop Item
Published:	2018
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/146261
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-146261
record_format	dspace
spelling	sg-nus-scholar.10635-1462612024-04-17T08:50:54Z Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers Lai H.-C. Savvides M. Chen T. OFFICE OF THE PROVOST DEPARTMENT OF COMPUTER SCIENCE 10.1109/BTAS.2007.4401930 IEEE Conference on Biometrics: Theory, Applications and Systems, BTAS'07 4401930 2018-08-21T05:06:47Z 2018-08-21T05:06:47Z 2007 Conference Paper Lai H.-C., Savvides M., Chen T. (2007). Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers. IEEE Conference on Biometrics: Theory, Applications and Systems, BTAS'07 : 4401930. ScholarBank@NUS Repository. https://doi.org/10.1109/BTAS.2007.4401930 9781424415977 http://scholarbank.nus.edu.sg/handle/10635/146261 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	10.1109/BTAS.2007.4401930
author2	OFFICE OF THE PROVOST
author_facet	OFFICE OF THE PROVOST Lai H.-C. Savvides M. Chen T.
format	Conference or Workshop Item
author	Lai H.-C. Savvides M. Chen T.
spellingShingle	Lai H.-C. Savvides M. Chen T. Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers
author_sort	Lai H.-C.
title	Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers
title_short	Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers
title_full	Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers
title_fullStr	Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers
title_full_unstemmed	Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers
title_sort	proposed fpga hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers
publishDate	2018
url	http://scholarbank.nus.edu.sg/handle/10635/146261
_version_	1800913419211112448

Proposed FPGA hardware architecture for high frame rate (>100 fps) face detection using feature cascade classifiers

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