A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS

A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS

Ph.D

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Bibliographic Details
Main Author: SIVA SATYENDRA SAHOO
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Theses and Dissertations
Language:English
Published: 2019
Subjects:
Cross-layer Reliability, Embedded System Design, System-level Design, Reconfigurable Systems, Hardware Partitioning, Fault-tolerant Computing
Online Access:https://scholarbank.nus.edu.sg/handle/10635/155568
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Institution: National University of Singapore
Language: English

Internet

https://scholarbank.nus.edu.sg/handle/10635/155568

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