A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS

Ph.D

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Bibliographic Details
Main Author:	SIVA SATYENDRA SAHOO
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Theses and Dissertations
Language:	English
Published:	2019
Subjects:	Cross-layer Reliability, Embedded System Design, System-level Design, Reconfigurable Systems, Hardware Partitioning, Fault-tolerant Computing
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/155568
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Institution:	National University of Singapore
Language:	English

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spelling	sg-nus-scholar.10635-1555682023-02-27T18:00:45Z A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS SIVA SATYENDRA SAHOO ELECTRICAL & COMPUTER ENGINEERING Bharadwaj Veeravalli Akash Kumar Cross-layer Reliability, Embedded System Design, System-level Design, Reconfigurable Systems, Hardware Partitioning, Fault-tolerant Computing Ph.D DOCTOR OF PHILOSOPHY (CDE-ENG) 2019-06-13T18:00:33Z 2019-06-13T18:00:33Z 2019-01-23 Thesis SIVA SATYENDRA SAHOO (2019-01-23). A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/155568 0000-0002-2243-5350 en
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
language	English
topic	Cross-layer Reliability, Embedded System Design, System-level Design, Reconfigurable Systems, Hardware Partitioning, Fault-tolerant Computing
spellingShingle	Cross-layer Reliability, Embedded System Design, System-level Design, Reconfigurable Systems, Hardware Partitioning, Fault-tolerant Computing SIVA SATYENDRA SAHOO A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS
description	Ph.D
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING SIVA SATYENDRA SAHOO
format	Theses and Dissertations
author	SIVA SATYENDRA SAHOO
author_sort	SIVA SATYENDRA SAHOO
title	A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS
title_short	A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS
title_full	A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS
title_fullStr	A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS
title_full_unstemmed	A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS
title_sort	cross-layer reliability-integrated system-level design methodology for heterogeneous multiprocessor soc-based embedded systems
publishDate	2019
url	https://scholarbank.nus.edu.sg/handle/10635/155568
_version_	1759058754744090624

A CROSS-LAYER RELIABILITY-INTEGRATED SYSTEM-LEVEL DESIGN METHODOLOGY FOR HETEROGENEOUS MULTIPROCESSOR SOC-BASED EMBEDDED SYSTEMS

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