High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM

10.1109/JETCAS.2016.2547701

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Main Authors: Seo, Yeongkyo, Kwon, Kon-Woo, Fong, Xuanyao, Roy, Kaushik
Other Authors: DEPT OF ELECTRICAL & COMPUTER ENGG
Format: Article
Language:English
Published: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC 2019
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Online Access:https://scholarbank.nus.edu.sg/handle/10635/156177
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Institution: National University of Singapore
Language: English
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spelling sg-nus-scholar.10635-1561772023-10-31T08:58:12Z High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM Seo, Yeongkyo Kwon, Kon-Woo Fong, Xuanyao Roy, Kaushik DEPT OF ELECTRICAL & COMPUTER ENGG Science & Technology Technology Engineering, Electrical & Electronic Engineering Dual 1R/W port on-chip memory spin hall metal (SHM) spin-orbit torque (SOT) spin-transfer torque magnetic random access memory (STT-MRAM) STT-MRAMS FUTURE ARCHITECTURE INPLANE 10.1109/JETCAS.2016.2547701 IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS 6 3 293-304 2019-07-03T03:23:47Z 2019-07-03T03:23:47Z 2016-09-01 2019-07-03T03:03:45Z Article Seo, Yeongkyo, Kwon, Kon-Woo, Fong, Xuanyao, Roy, Kaushik (2016-09-01). High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM. IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS 6 (3) : 293-304. ScholarBank@NUS Repository. https://doi.org/10.1109/JETCAS.2016.2547701 2156-3357 2156-3365 https://scholarbank.nus.edu.sg/handle/10635/156177 en IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC Elements
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
language English
topic Science & Technology
Technology
Engineering, Electrical & Electronic
Engineering
Dual 1R/W port
on-chip memory
spin hall metal (SHM)
spin-orbit torque (SOT)
spin-transfer torque magnetic random access memory (STT-MRAM)
STT-MRAMS
FUTURE
ARCHITECTURE
INPLANE
spellingShingle Science & Technology
Technology
Engineering, Electrical & Electronic
Engineering
Dual 1R/W port
on-chip memory
spin hall metal (SHM)
spin-orbit torque (SOT)
spin-transfer torque magnetic random access memory (STT-MRAM)
STT-MRAMS
FUTURE
ARCHITECTURE
INPLANE
Seo, Yeongkyo
Kwon, Kon-Woo
Fong, Xuanyao
Roy, Kaushik
High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM
description 10.1109/JETCAS.2016.2547701
author2 DEPT OF ELECTRICAL & COMPUTER ENGG
author_facet DEPT OF ELECTRICAL & COMPUTER ENGG
Seo, Yeongkyo
Kwon, Kon-Woo
Fong, Xuanyao
Roy, Kaushik
format Article
author Seo, Yeongkyo
Kwon, Kon-Woo
Fong, Xuanyao
Roy, Kaushik
author_sort Seo, Yeongkyo
title High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM
title_short High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM
title_full High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM
title_fullStr High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM
title_full_unstemmed High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM
title_sort high performance and energy-efficient on-chip cache using dual port (1r/1w) spin-orbit torque mram
publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
publishDate 2019
url https://scholarbank.nus.edu.sg/handle/10635/156177
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