High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM

• Main Authors: Seo, Yeongkyo, Kwon, Kon-Woo, Fong, Xuanyao, Roy, Kaushik
• Other Authors: DEPT OF ELECTRICAL & COMPUTER ENGG
• Format: Article
• Language: English
• Published: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC 2019
• Subjects: Science & Technology; Technology; Engineering, Electrical & Electronic; Engineering; Dual 1R/W port; on-chip memory; spin hall metal (SHM); spin-orbit torque (SOT); spin-transfer torque magnetic random access memory (STT-MRAM); STT-MRAMS; FUTURE; ARCHITECTURE; INPLANE
• Online Access: https://scholarbank.nus.edu.sg/handle/10635/156177
• Institution: National University of Singapore

10.1109/JETCAS.2016.2547701