Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells

• المؤلفون الرئيسيون: Fong, Xuanyao, Kim, Yusung, Choday, Sri Harsha, Roy, Kaushik
• مؤلفون آخرون: ELECTRICAL AND COMPUTER ENGINEERING
• التنسيق: مقال
• اللغة: English
• منشور في: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC 2019
• الموضوعات: Science & Technology; Technology; Computer Science, Hardware & Architecture; Engineering, Electrical & Electronic; Computer Science; Engineering; Bit-cell optimization; failure mitigation; magnetic tunneling junction (MTJ); spin-transfer torque magnetic RAM (STT-MRAM); MAGNETIC TUNNEL-JUNCTIONS; STT-MRAM
• الوصول للمادة أونلاين: https://scholarbank.nus.edu.sg/handle/10635/156174
• المؤسسة: National University of Singapore

10.1109/TVLSI.2013.2239671