Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells

Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells

10.1109/TVLSI.2013.2239671

Saved in:

Bibliographic Details
Main Authors:	Fong, Xuanyao, Kim, Yusung, Choday, Sri Harsha, Roy, Kaushik
Other Authors:	DEPT OF ELECTRICAL & COMPUTER ENGG
Format:	Article
Language:	English
Published:	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC 2019
Subjects:	Science & Technology Technology Computer Science, Hardware & Architecture Engineering, Electrical & Electronic Computer Science Engineering Bit-cell optimization failure mitigation magnetic tunneling junction (MTJ) spin-transfer torque magnetic RAM (STT-MRAM) MAGNETIC TUNNEL-JUNCTIONS STT-MRAM
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/156174
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	National University of Singapore
Language:	English

Be the first to leave a comment!