Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors

Ph.D

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Bibliographic Details
Main Author:	MANTAVYA SINHA
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Theses and Dissertations
Language:	English
Published:	2010
Subjects:	Metal-semiconductor contacts, Schottky barrier height, contact resistance, FinFETs, aluminum implant, acceptor-type trap levels
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/17331
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Institution:	National University of Singapore
Language:	English

id	sg-nus-scholar.10635-17331
record_format	dspace
spelling	sg-nus-scholar.10635-173312024-10-26T13:58:35Z Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors MANTAVYA SINHA ELECTRICAL & COMPUTER ENGINEERING CHOR ENG FONG YEO YEE CHIA LO GUO-QIANG PATRICK Metal-semiconductor contacts, Schottky barrier height, contact resistance, FinFETs, aluminum implant, acceptor-type trap levels Ph.D DOCTOR OF PHILOSOPHY 2010-06-08T18:00:22Z 2010-06-08T18:00:22Z 2010-01-04 Thesis MANTAVYA SINHA (2010-01-04). Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/17331 NOT_IN_WOS en
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
language	English
topic	Metal-semiconductor contacts, Schottky barrier height, contact resistance, FinFETs, aluminum implant, acceptor-type trap levels
spellingShingle	Metal-semiconductor contacts, Schottky barrier height, contact resistance, FinFETs, aluminum implant, acceptor-type trap levels MANTAVYA SINHA Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors
description	Ph.D
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING MANTAVYA SINHA
format	Theses and Dissertations
author	MANTAVYA SINHA
author_sort	MANTAVYA SINHA
title	Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors
title_short	Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors
title_full	Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors
title_fullStr	Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors
title_full_unstemmed	Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors
title_sort	schottky barrier engineering for contact resistance reduction in nanoscale cmos transistors
publishDate	2010
url	http://scholarbank.nus.edu.sg/handle/10635/17331
_version_	1821232330632593408

Schottky barrier engineering for contact resistance reduction in nanoscale CMOS transistors

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