A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING

Master's

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Bibliographic Details
Main Author:	GOH WEI CHUAN
Other Authors:	ELECTRICAL ENGINEERING
Format:	Theses and Dissertations
Published:	2020
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/174712
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-174712
record_format	dspace
spelling	sg-nus-scholar.10635-1747122020-11-19T13:57:14Z A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING GOH WEI CHUAN ELECTRICAL ENGINEERING YE QIN ZHONG Master's MASTER OF ENGINEERING 2020-09-08T08:51:55Z 2020-09-08T08:51:55Z 1998 Thesis GOH WEI CHUAN (1998). A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/174712 CCK BATCHLOAD 20200918
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	Master's
author2	ELECTRICAL ENGINEERING
author_facet	ELECTRICAL ENGINEERING GOH WEI CHUAN
format	Theses and Dissertations
author	GOH WEI CHUAN
spellingShingle	GOH WEI CHUAN A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING
author_sort	GOH WEI CHUAN
title	A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING
title_short	A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING
title_full	A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING
title_fullStr	A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING
title_full_unstemmed	A RECONFIGURABLE PIPELINED PROCESSOR FOR REAL TIME IMAGE PROCESSING
title_sort	reconfigurable pipelined processor for real time image processing
publishDate	2020
url	https://scholarbank.nus.edu.sg/handle/10635/174712
_version_	1686108873673408512

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