Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers

IEEE ESSCIRC 2021

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Bibliographic Details
Main Authors:	Fassio, Luigi, De Rose, Raffaele, Longyang Lin, Lanuzza, Marco, Crupi, Felice, Alioto, Massimo Bruno
Other Authors:	ELECTRICAL AND COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	IEEE 2021
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/192143
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-192143
record_format	dspace
spelling	sg-nus-scholar.10635-1921432024-11-14T14:33:43Z Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers Fassio, Luigi De Rose, Raffaele Longyang Lin Lanuzza, Marco Crupi, Felice Alioto, Massimo Bruno ELECTRICAL AND COMPUTER ENGINEERING Prof Massimo Bruno Alioto IEEE ESSCIRC 2021 United States 2021-06-23T04:34:41Z 2021-06-23T04:34:41Z 2021-06-02 2021-06-23T03:57:18Z Conference Paper Fassio, Luigi, De Rose, Raffaele, Longyang Lin, Lanuzza, Marco, Crupi, Felice, Alioto, Massimo Bruno (2021-06-02). Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers. IEEE ESSCIRC 2021. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/192143 IEEE Elements
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	IEEE ESSCIRC 2021
author2	ELECTRICAL AND COMPUTER ENGINEERING
author_facet	ELECTRICAL AND COMPUTER ENGINEERING Fassio, Luigi De Rose, Raffaele Longyang Lin Lanuzza, Marco Crupi, Felice Alioto, Massimo Bruno
format	Conference or Workshop Item
author	Fassio, Luigi De Rose, Raffaele Longyang Lin Lanuzza, Marco Crupi, Felice Alioto, Massimo Bruno
spellingShingle	Fassio, Luigi De Rose, Raffaele Longyang Lin Lanuzza, Marco Crupi, Felice Alioto, Massimo Bruno Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers
author_sort	Fassio, Luigi
title	Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers
title_short	Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers
title_full	Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers
title_fullStr	Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers
title_full_unstemmed	Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers
title_sort	trimming-less 0.2-v, 3.2-pw voltage reference based on corner-aware replica combination with 1.6% process sensitivity, 1.4-mv accuracy across pvt and wafers
publisher	IEEE
publishDate	2021
url	https://scholarbank.nus.edu.sg/handle/10635/192143
_version_	1821231829486665728

Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers

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