DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING

Ph.D

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Bibliographic Details
Main Author: VELURI HASITA
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Theses and Dissertations
Language:English
Published: 2022
Subjects:
Online Access:https://scholarbank.nus.edu.sg/handle/10635/225258
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Institution: National University of Singapore
Language: English
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spelling sg-nus-scholar.10635-2252582024-05-01T18:00:36Z DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING VELURI HASITA ELECTRICAL & COMPUTER ENGINEERING Voon Yew Thean DTCO for IoT, memristors, hardware accelerators, analog memory accelerators, DFT using analog memories Ph.D DOCTOR OF PHILOSOPHY (CDE-ENG) 2022-05-11T18:00:21Z 2022-05-11T18:00:21Z 2022-01-03 Thesis VELURI HASITA (2022-01-03). DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/225258 0000-0002-0549-8341 en
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
language English
topic DTCO for IoT, memristors, hardware accelerators, analog memory accelerators, DFT using analog memories
spellingShingle DTCO for IoT, memristors, hardware accelerators, analog memory accelerators, DFT using analog memories
VELURI HASITA
DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING
description Ph.D
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
VELURI HASITA
format Theses and Dissertations
author VELURI HASITA
author_sort VELURI HASITA
title DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING
title_short DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING
title_full DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING
title_fullStr DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING
title_full_unstemmed DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING
title_sort design of low power, hardware-aware analog memory-based accelerators for deep learning
publishDate 2022
url https://scholarbank.nus.edu.sg/handle/10635/225258
_version_ 1800915390692327424