From Statecharts to Verilog: A formal approach to hardware/software co-specification

10.1007/s11334-005-0020-2

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Main Authors: Qin, S., Chin, W.-N., He, J., Qiu, Z.
Other Authors: COMPUTER SCIENCE
Format: Article
Published: 2013
Subjects:
Online Access:http://scholarbank.nus.edu.sg/handle/10635/39387
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-393872023-10-26T21:33:26Z From Statecharts to Verilog: A formal approach to hardware/software co-specification Qin, S. Chin, W.-N. He, J. Qiu, Z. COMPUTER SCIENCE Algebraic laws Hardware/software partitioning Homomorphism Operational semantics Statecharts Verilog 10.1007/s11334-005-0020-2 Innovations in Systems and Software Engineering 2 1 17-38 2013-07-04T07:40:29Z 2013-07-04T07:40:29Z 2006 Article Qin, S., Chin, W.-N., He, J., Qiu, Z. (2006). From Statecharts to Verilog: A formal approach to hardware/software co-specification. Innovations in Systems and Software Engineering 2 (1) : 17-38. ScholarBank@NUS Repository. https://doi.org/10.1007/s11334-005-0020-2 16145046 http://scholarbank.nus.edu.sg/handle/10635/39387 000217384800002 Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
topic Algebraic laws
Hardware/software partitioning
Homomorphism
Operational semantics
Statecharts
Verilog
spellingShingle Algebraic laws
Hardware/software partitioning
Homomorphism
Operational semantics
Statecharts
Verilog
Qin, S.
Chin, W.-N.
He, J.
Qiu, Z.
From Statecharts to Verilog: A formal approach to hardware/software co-specification
description 10.1007/s11334-005-0020-2
author2 COMPUTER SCIENCE
author_facet COMPUTER SCIENCE
Qin, S.
Chin, W.-N.
He, J.
Qiu, Z.
format Article
author Qin, S.
Chin, W.-N.
He, J.
Qiu, Z.
author_sort Qin, S.
title From Statecharts to Verilog: A formal approach to hardware/software co-specification
title_short From Statecharts to Verilog: A formal approach to hardware/software co-specification
title_full From Statecharts to Verilog: A formal approach to hardware/software co-specification
title_fullStr From Statecharts to Verilog: A formal approach to hardware/software co-specification
title_full_unstemmed From Statecharts to Verilog: A formal approach to hardware/software co-specification
title_sort from statecharts to verilog: a formal approach to hardware/software co-specification
publishDate 2013
url http://scholarbank.nus.edu.sg/handle/10635/39387
_version_ 1781411009871740928