Interface design for rationally clocked GALS systems
10.1109/ASYNC.2006.19
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sg-nus-scholar.10635-403582023-10-30T08:09:08Z Interface design for rationally clocked GALS systems Mekie, J. Chakraborty, S. Venkataramani, G. Thiagarajan, P.S. Sharma, D.K. COMPUTER SCIENCE 10.1109/ASYNC.2006.19 Proceedings - International Symposium on Asynchronous Circuits and Systems 2006 160-171 2013-07-04T08:02:30Z 2013-07-04T08:02:30Z 2006 Conference Paper Mekie, J., Chakraborty, S., Venkataramani, G., Thiagarajan, P.S., Sharma, D.K. (2006). Interface design for rationally clocked GALS systems. Proceedings - International Symposium on Asynchronous Circuits and Systems 2006 : 160-171. ScholarBank@NUS Repository. https://doi.org/10.1109/ASYNC.2006.19 0769524982 15228681 http://scholarbank.nus.edu.sg/handle/10635/40358 000237342400016 Scopus |
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COMPUTER SCIENCE Mekie, J. Chakraborty, S. Venkataramani, G. Thiagarajan, P.S. Sharma, D.K. |
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Conference or Workshop Item |
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Mekie, J. Chakraborty, S. Venkataramani, G. Thiagarajan, P.S. Sharma, D.K. |
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Mekie, J. Chakraborty, S. Venkataramani, G. Thiagarajan, P.S. Sharma, D.K. Interface design for rationally clocked GALS systems |
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Mekie, J. |
title |
Interface design for rationally clocked GALS systems |
title_short |
Interface design for rationally clocked GALS systems |
title_full |
Interface design for rationally clocked GALS systems |
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Interface design for rationally clocked GALS systems |
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Interface design for rationally clocked GALS systems |
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interface design for rationally clocked gals systems |
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2013 |
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http://scholarbank.nus.edu.sg/handle/10635/40358 |
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