Interface design for rationally clocked GALS systems

10.1109/ASYNC.2006.19

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Bibliographic Details
Main Authors: Mekie, J., Chakraborty, S., Venkataramani, G., Thiagarajan, P.S., Sharma, D.K.
Other Authors: COMPUTER SCIENCE
Format: Conference or Workshop Item
Published: 2013
Online Access:http://scholarbank.nus.edu.sg/handle/10635/40358
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-403582023-10-30T08:09:08Z Interface design for rationally clocked GALS systems Mekie, J. Chakraborty, S. Venkataramani, G. Thiagarajan, P.S. Sharma, D.K. COMPUTER SCIENCE 10.1109/ASYNC.2006.19 Proceedings - International Symposium on Asynchronous Circuits and Systems 2006 160-171 2013-07-04T08:02:30Z 2013-07-04T08:02:30Z 2006 Conference Paper Mekie, J., Chakraborty, S., Venkataramani, G., Thiagarajan, P.S., Sharma, D.K. (2006). Interface design for rationally clocked GALS systems. Proceedings - International Symposium on Asynchronous Circuits and Systems 2006 : 160-171. ScholarBank@NUS Repository. https://doi.org/10.1109/ASYNC.2006.19 0769524982 15228681 http://scholarbank.nus.edu.sg/handle/10635/40358 000237342400016 Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
description 10.1109/ASYNC.2006.19
author2 COMPUTER SCIENCE
author_facet COMPUTER SCIENCE
Mekie, J.
Chakraborty, S.
Venkataramani, G.
Thiagarajan, P.S.
Sharma, D.K.
format Conference or Workshop Item
author Mekie, J.
Chakraborty, S.
Venkataramani, G.
Thiagarajan, P.S.
Sharma, D.K.
spellingShingle Mekie, J.
Chakraborty, S.
Venkataramani, G.
Thiagarajan, P.S.
Sharma, D.K.
Interface design for rationally clocked GALS systems
author_sort Mekie, J.
title Interface design for rationally clocked GALS systems
title_short Interface design for rationally clocked GALS systems
title_full Interface design for rationally clocked GALS systems
title_fullStr Interface design for rationally clocked GALS systems
title_full_unstemmed Interface design for rationally clocked GALS systems
title_sort interface design for rationally clocked gals systems
publishDate 2013
url http://scholarbank.nus.edu.sg/handle/10635/40358
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