Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators

10.1109/FCCM.2009.49

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Main Authors: Sim, J.E., Wong, W.-F., Teich, J.
Other Authors: COMPUTER SCIENCE
Format: Conference or Workshop Item
Published: 2013
Online Access:http://scholarbank.nus.edu.sg/handle/10635/41618
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-416182023-10-27T07:49:57Z Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators Sim, J.E. Wong, W.-F. Teich, J. COMPUTER SCIENCE 10.1109/FCCM.2009.49 Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009 279-282 2013-07-04T08:31:44Z 2013-07-04T08:31:44Z 2009 Conference Paper Sim, J.E., Wong, W.-F., Teich, J. (2009). Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators. Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009 : 279-282. ScholarBank@NUS Repository. https://doi.org/10.1109/FCCM.2009.49 9780769537160 http://scholarbank.nus.edu.sg/handle/10635/41618 000275103200041 Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
description 10.1109/FCCM.2009.49
author2 COMPUTER SCIENCE
author_facet COMPUTER SCIENCE
Sim, J.E.
Wong, W.-F.
Teich, J.
format Conference or Workshop Item
author Sim, J.E.
Wong, W.-F.
Teich, J.
spellingShingle Sim, J.E.
Wong, W.-F.
Teich, J.
Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators
author_sort Sim, J.E.
title Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators
title_short Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators
title_full Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators
title_fullStr Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators
title_full_unstemmed Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators
title_sort optimal placement-aware trace-based scheduling of hardware reconfigurations for fpga accelerators
publishDate 2013
url http://scholarbank.nus.edu.sg/handle/10635/41618
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