An integrated performance and power model for superscalar processor designs

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

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Bibliographic Details
Main Authors: Zhu, Y., Wong, W.-F., Andrei, S.
Other Authors: SINGAPORE-MIT ALLIANCE
Format: Conference or Workshop Item
Published: 2013
Online Access:http://scholarbank.nus.edu.sg/handle/10635/43270
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-432702024-11-13T03:29:19Z An integrated performance and power model for superscalar processor designs Zhu, Y. Wong, W.-F. Andrei, S. SINGAPORE-MIT ALLIANCE COMPUTER SCIENCE Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 2 948-951 2013-07-23T09:29:35Z 2013-07-23T09:29:35Z 2005 Conference Paper Zhu, Y.,Wong, W.-F.,Andrei, S. (2005). An integrated performance and power model for superscalar processor designs. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 2 : 948-951. ScholarBank@NUS Repository. 0780387368 http://scholarbank.nus.edu.sg/handle/10635/43270 NOT_IN_WOS Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
description Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
author2 SINGAPORE-MIT ALLIANCE
author_facet SINGAPORE-MIT ALLIANCE
Zhu, Y.
Wong, W.-F.
Andrei, S.
format Conference or Workshop Item
author Zhu, Y.
Wong, W.-F.
Andrei, S.
spellingShingle Zhu, Y.
Wong, W.-F.
Andrei, S.
An integrated performance and power model for superscalar processor designs
author_sort Zhu, Y.
title An integrated performance and power model for superscalar processor designs
title_short An integrated performance and power model for superscalar processor designs
title_full An integrated performance and power model for superscalar processor designs
title_fullStr An integrated performance and power model for superscalar processor designs
title_full_unstemmed An integrated performance and power model for superscalar processor designs
title_sort integrated performance and power model for superscalar processor designs
publishDate 2013
url http://scholarbank.nus.edu.sg/handle/10635/43270
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