Reconfigurable signal processing and hardware architecture for broadband wireless communications

10.1155/WCN.2005.323

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Bibliographic Details
Main Authors:	Liang, Y.-C., Naveen, S., Pilakkat, S.K., Marath, A.K.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Subjects:	Broadband communications Cyclic prefix Frequency-domain equalization Reconfigurable signal processing Software-defined radio
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/57211
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-57211
record_format	dspace
spelling	sg-nus-scholar.10635-572112024-11-15T02:42:07Z Reconfigurable signal processing and hardware architecture for broadband wireless communications Liang, Y.-C. Naveen, S. Pilakkat, S.K. Marath, A.K. ELECTRICAL & COMPUTER ENGINEERING Broadband communications Cyclic prefix Frequency-domain equalization Reconfigurable signal processing Software-defined radio 10.1155/WCN.2005.323 Eurasip Journal on Wireless Communications and Networking 2005 3 323-332 2014-06-17T03:03:35Z 2014-06-17T03:03:35Z 2005-08-01 Article Liang, Y.-C.,Naveen, S.,Pilakkat, S.K.,Marath, A.K. (2005-08-01). Reconfigurable signal processing and hardware architecture for broadband wireless communications. Eurasip Journal on Wireless Communications and Networking 2005 (3) : 323-332. ScholarBank@NUS Repository. <a href="https://doi.org/10.1155/WCN.2005.323" target="_blank">https://doi.org/10.1155/WCN.2005.323</a> 16871472 http://scholarbank.nus.edu.sg/handle/10635/57211 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
topic	Broadband communications Cyclic prefix Frequency-domain equalization Reconfigurable signal processing Software-defined radio
spellingShingle	Broadband communications Cyclic prefix Frequency-domain equalization Reconfigurable signal processing Software-defined radio Liang, Y.-C. Naveen, S. Pilakkat, S.K. Marath, A.K. Reconfigurable signal processing and hardware architecture for broadband wireless communications
description	10.1155/WCN.2005.323
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Liang, Y.-C. Naveen, S. Pilakkat, S.K. Marath, A.K.
format	Article
author	Liang, Y.-C. Naveen, S. Pilakkat, S.K. Marath, A.K.
author_sort	Liang, Y.-C.
title	Reconfigurable signal processing and hardware architecture for broadband wireless communications
title_short	Reconfigurable signal processing and hardware architecture for broadband wireless communications
title_full	Reconfigurable signal processing and hardware architecture for broadband wireless communications
title_fullStr	Reconfigurable signal processing and hardware architecture for broadband wireless communications
title_full_unstemmed	Reconfigurable signal processing and hardware architecture for broadband wireless communications
title_sort	reconfigurable signal processing and hardware architecture for broadband wireless communications
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/57211
_version_	1821209558233645056

Reconfigurable signal processing and hardware architecture for broadband wireless communications

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