A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs
10.1109/IPDPSW.2012.23
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2014
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sg-nus-scholar.10635-690092023-10-26T20:41:05Z A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs Loke, W.T. Ha, Y. Zhao, W. ELECTRICAL & COMPUTER ENGINEERING Dual-VT EDA FPGA Programmable-VT Reverse Back Bias Technology Mapping 10.1109/IPDPSW.2012.23 Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012 221-226 2014-06-19T02:55:49Z 2014-06-19T02:55:49Z 2012 Conference Paper Loke, W.T., Ha, Y., Zhao, W. (2012). A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs. Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012 : 221-226. ScholarBank@NUS Repository. https://doi.org/10.1109/IPDPSW.2012.23 9780769546766 http://scholarbank.nus.edu.sg/handle/10635/69009 000309409400020 Scopus |
| institution |
National University of Singapore |
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NUS Library |
| continent |
Asia |
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Singapore Singapore |
| content_provider |
NUS Library |
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ScholarBank@NUS |
| topic |
Dual-VT EDA FPGA Programmable-VT Reverse Back Bias Technology Mapping |
| spellingShingle |
Dual-VT EDA FPGA Programmable-VT Reverse Back Bias Technology Mapping Loke, W.T. Ha, Y. Zhao, W. A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs |
| description |
10.1109/IPDPSW.2012.23 |
| author2 |
ELECTRICAL & COMPUTER ENGINEERING |
| author_facet |
ELECTRICAL & COMPUTER ENGINEERING Loke, W.T. Ha, Y. Zhao, W. |
| format |
Conference or Workshop Item |
| author |
Loke, W.T. Ha, Y. Zhao, W. |
| author_sort |
Loke, W.T. |
| title |
A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs |
| title_short |
A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs |
| title_full |
A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs |
| title_fullStr |
A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs |
| title_full_unstemmed |
A power and cluster-aware technology mapping and clustering scheme for dual-VT FPGAs |
| title_sort |
power and cluster-aware technology mapping and clustering scheme for dual-vt fpgas |
| publishDate |
2014 |
| url |
http://scholarbank.nus.edu.sg/handle/10635/69009 |
| _version_ |
1781783078316802048 |