An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects

10.1109/FCCM.2008.28

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Main Authors: Liu, H., Chen, X., Ha, Y.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Conference or Workshop Item
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/69286
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-692862023-09-21T20:43:19Z An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects Liu, H. Chen, X. Ha, Y. ELECTRICAL & COMPUTER ENGINEERING 10.1109/FCCM.2008.28 Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08 275-276 2014-06-19T02:58:58Z 2014-06-19T02:58:58Z 2008 Conference Paper Liu, H., Chen, X., Ha, Y. (2008). An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects. Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08 : 275-276. ScholarBank@NUS Repository. https://doi.org/10.1109/FCCM.2008.28 9780769533070 http://scholarbank.nus.edu.sg/handle/10635/69286 000264409100031 Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
description 10.1109/FCCM.2008.28
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
Liu, H.
Chen, X.
Ha, Y.
format Conference or Workshop Item
author Liu, H.
Chen, X.
Ha, Y.
spellingShingle Liu, H.
Chen, X.
Ha, Y.
An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects
author_sort Liu, H.
title An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects
title_short An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects
title_full An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects
title_fullStr An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects
title_full_unstemmed An area-efficient timing-driven routing algorithm for scalable FPGAs with time-multiplexed interconnects
title_sort area-efficient timing-driven routing algorithm for scalable fpgas with time-multiplexed interconnects
publishDate 2014
url http://scholarbank.nus.edu.sg/handle/10635/69286
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