VLSI circuits for decomposing binary integers into signed power-of-two terms

Proceedings - IEEE International Symposium on Circuits and Systems

محفوظ في:

التفاصيل البيبلوغرافية
المؤلفون الرئيسيون:	Yong, Ching Lim, Liu, Bede, Evans, Joseph B.
مؤلفون آخرون:	ELECTRICAL ENGINEERING
التنسيق:	Conference or Workshop Item
منشور في:	2014
الوصول للمادة أونلاين:	http://scholarbank.nus.edu.sg/handle/10635/72990
الوسوم:	إضافة وسم لا توجد وسوم, كن أول من يضع وسما على هذه التسجيلة!
المؤسسة:	National University of Singapore

id	sg-nus-scholar.10635-72990
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spelling	sg-nus-scholar.10635-729902024-11-10T17:37:46Z VLSI circuits for decomposing binary integers into signed power-of-two terms Yong, Ching Lim Liu, Bede Evans, Joseph B. ELECTRICAL ENGINEERING Proceedings - IEEE International Symposium on Circuits and Systems 3 2304-2307 PICSD 2014-06-19T05:14:17Z 2014-06-19T05:14:17Z 1990 Conference Paper Yong, Ching Lim,Liu, Bede,Evans, Joseph B. (1990). VLSI circuits for decomposing binary integers into signed power-of-two terms. Proceedings - IEEE International Symposium on Circuits and Systems 3 : 2304-2307. ScholarBank@NUS Repository. 02714310 http://scholarbank.nus.edu.sg/handle/10635/72990 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	Proceedings - IEEE International Symposium on Circuits and Systems
author2	ELECTRICAL ENGINEERING
author_facet	ELECTRICAL ENGINEERING Yong, Ching Lim Liu, Bede Evans, Joseph B.
format	Conference or Workshop Item
author	Yong, Ching Lim Liu, Bede Evans, Joseph B.
spellingShingle	Yong, Ching Lim Liu, Bede Evans, Joseph B. VLSI circuits for decomposing binary integers into signed power-of-two terms
author_sort	Yong, Ching Lim
title	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_short	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_full	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_fullStr	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_full_unstemmed	VLSI circuits for decomposing binary integers into signed power-of-two terms
title_sort	vlsi circuits for decomposing binary integers into signed power-of-two terms
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/72990
_version_	1821191580225110016

VLSI circuits for decomposing binary integers into signed power-of-two terms

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