50-250 MHz ΔΣ DLL for clock synchronization
10.1109/JSSC.2010.2072591
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2014
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sg-nus-scholar.10635-833022023-10-29T20:28:47Z 50-250 MHz ΔΣ DLL for clock synchronization Cheng, S.-J. Qiu, L. Zheng, Y. Heng, C.-H. ELECTRICAL & COMPUTER ENGINEERING anti-harmonic detector Clock synchronization delay-locked loop (DLL) delta-sigma modulation digital-to-phase converter low jitter second order adaptive filter 10.1109/JSSC.2010.2072591 IEEE Journal of Solid-State Circuits 45 11 2445-2456 IJSCB 2014-10-07T04:39:44Z 2014-10-07T04:39:44Z 2010-11 Conference Paper Cheng, S.-J., Qiu, L., Zheng, Y., Heng, C.-H. (2010-11). 50-250 MHz ΔΣ DLL for clock synchronization. IEEE Journal of Solid-State Circuits 45 (11) : 2445-2456. ScholarBank@NUS Repository. https://doi.org/10.1109/JSSC.2010.2072591 00189200 http://scholarbank.nus.edu.sg/handle/10635/83302 000283442500023 Scopus |
| institution |
National University of Singapore |
| building |
NUS Library |
| continent |
Asia |
| country |
Singapore Singapore |
| content_provider |
NUS Library |
| collection |
ScholarBank@NUS |
| topic |
anti-harmonic detector Clock synchronization delay-locked loop (DLL) delta-sigma modulation digital-to-phase converter low jitter second order adaptive filter |
| spellingShingle |
anti-harmonic detector Clock synchronization delay-locked loop (DLL) delta-sigma modulation digital-to-phase converter low jitter second order adaptive filter Cheng, S.-J. Qiu, L. Zheng, Y. Heng, C.-H. 50-250 MHz ΔΣ DLL for clock synchronization |
| description |
10.1109/JSSC.2010.2072591 |
| author2 |
ELECTRICAL & COMPUTER ENGINEERING |
| author_facet |
ELECTRICAL & COMPUTER ENGINEERING Cheng, S.-J. Qiu, L. Zheng, Y. Heng, C.-H. |
| format |
Conference or Workshop Item |
| author |
Cheng, S.-J. Qiu, L. Zheng, Y. Heng, C.-H. |
| author_sort |
Cheng, S.-J. |
| title |
50-250 MHz ΔΣ DLL for clock synchronization |
| title_short |
50-250 MHz ΔΣ DLL for clock synchronization |
| title_full |
50-250 MHz ΔΣ DLL for clock synchronization |
| title_fullStr |
50-250 MHz ΔΣ DLL for clock synchronization |
| title_full_unstemmed |
50-250 MHz ΔΣ DLL for clock synchronization |
| title_sort |
50-250 mhz δσ dll for clock synchronization |
| publishDate |
2014 |
| url |
http://scholarbank.nus.edu.sg/handle/10635/83302 |
| _version_ |
1781784351712739328 |