Visilence: An interactive visualization tool for error resilience analysis
Soft errors have become one of the major concerns for HPC applications, as those errors can result in seriously corrupted outcomes, such as silent data corruptions (SDCs). Prior studies on error resilience have studied the robustness of HPC applications. However, it is still difficult for program de...
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sg-smu-ink.sis_research-78472022-05-04T04:01:16Z Visilence: An interactive visualization tool for error resilience analysis RUAN, Shaolun WANG, Yong GUAN, Qiang Soft errors have become one of the major concerns for HPC applications, as those errors can result in seriously corrupted outcomes, such as silent data corruptions (SDCs). Prior studies on error resilience have studied the robustness of HPC applications. However, it is still difficult for program developers to identify potential vulnerability to soft errors. In this paper, we present Visilence, a novel visualization tool to visually analyze error vulnerability based on the control-flow graph generated from HPC applications. Visilence efficiently visualizes the affected program states under injected errors and presents the visual analysis of the most vulnerable parts of an application. We demonstrate the effectiveness of Visilence through a case study. 2021-10-01T07:00:00Z text application/pdf https://ink.library.smu.edu.sg/sis_research/6844 https://ink.library.smu.edu.sg/context/sis_research/article/7847/viewcontent/21_IEEEVIS_Poster_visilence.pdf http://creativecommons.org/licenses/by-nc-nd/4.0/ Research Collection School Of Computing and Information Systems eng Institutional Knowledge at Singapore Management University Databases and Information Systems Graphics and Human Computer Interfaces |
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Databases and Information Systems Graphics and Human Computer Interfaces RUAN, Shaolun WANG, Yong GUAN, Qiang Visilence: An interactive visualization tool for error resilience analysis |
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Soft errors have become one of the major concerns for HPC applications, as those errors can result in seriously corrupted outcomes, such as silent data corruptions (SDCs). Prior studies on error resilience have studied the robustness of HPC applications. However, it is still difficult for program developers to identify potential vulnerability to soft errors. In this paper, we present Visilence, a novel visualization tool to visually analyze error vulnerability based on the control-flow graph generated from HPC applications. Visilence efficiently visualizes the affected program states under injected errors and presents the visual analysis of the most vulnerable parts of an application. We demonstrate the effectiveness of Visilence through a case study. |
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text |
author |
RUAN, Shaolun WANG, Yong GUAN, Qiang |
author_facet |
RUAN, Shaolun WANG, Yong GUAN, Qiang |
author_sort |
RUAN, Shaolun |
title |
Visilence: An interactive visualization tool for error resilience analysis |
title_short |
Visilence: An interactive visualization tool for error resilience analysis |
title_full |
Visilence: An interactive visualization tool for error resilience analysis |
title_fullStr |
Visilence: An interactive visualization tool for error resilience analysis |
title_full_unstemmed |
Visilence: An interactive visualization tool for error resilience analysis |
title_sort |
visilence: an interactive visualization tool for error resilience analysis |
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Institutional Knowledge at Singapore Management University |
publishDate |
2021 |
url |
https://ink.library.smu.edu.sg/sis_research/6844 https://ink.library.smu.edu.sg/context/sis_research/article/7847/viewcontent/21_IEEEVIS_Poster_visilence.pdf |
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