ASIC implementation of a high speed and low power scalar product computation unit

by Low, Jeremy Yung Shern.
Published 2009

VLSI efficient RNS scalers and arbitrary modulus residue generators

by Low, Jeremy Yung Shern
Published 2014

Simple, fast, and exact RNS scaler for the three-moduli set {2n - 1, 2n, 2n + 1}

by Chang, Chip-Hong, Low, Jeremy Yung Shern
Published 2015

A new approach to the design of efficient residue generators for arbitrary moduli

by Low, Jeremy Yung Shern, Chang, Chip Hong
Published 2013

A VLSI efficient programmable power-of-two scaler for 2n-1, 2n,2n+1 RNS

by Low, Jeremy Yung Shern, Chang, Chip Hong
Published 2013

Efficient VLSI implementation of 2^n scaling of signed integer in RNS {2^n-1, 2^n, 2^n+1}

by Tay, Thian Fatt, Chang, Chip-Hong, Low, Jeremy Yung Shern
Published 2015

A unified {2n−1, 2n, 2n+1} RNS scaler with dual scaling constants

by Low, Jeremy Yung Shern, Tay, Thian Fatt, Chang, Chip Hong
Published 2013

Design and sensitivity analysis of a new current-mode sense amplifier for low-power SRAM

by Do, Anh Tuan, Kong, Zhi Hui, Yeo, Kiat Seng, Low, Jeremy Yung Shern
Published 2010

A full current-mode sense amplifier for low-power SRAM applications

by Do, Anh Tuan, Low, Jeremy Yung Shern, Kong, Zhi Hui, Yeo, Kiat Seng, Low, Joshua Yung Lih
Published 2010

A fast and compact circuit for integer square root computation based on Mitchell logarithmic method

by Low, Joshua Yung Lih, Jong, Ching Chuen, Low, Jeremy Yung Shern, Tay, Thian Fatt, Chang, Chip Hong
Published 2013

A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion

by Tang, Howard, Low, Joshua Yung Lih, Low, Jeremy Yung Shern, Siek, Liter, Jong, Ching Chuen, Chang, Chip Hong
Published 2013