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1

New architectures of multiplier and inner-product processor for high-speed on-chip serial-link bus

New architectures of multiplier and inner-product processor for high-speed on-chip serial-link bus

由 Meher, Manas Ranjan.
出版 2013

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Theses and Dissertations

2

High-speed and low-power serial accumulator for serial/parallel multiplier

High-speed and low-power serial accumulator for serial/parallel multiplier

由 Meher, Manas Ranjan, Jong, Ching Chuen, Chang, Chip Hong
出版 2010

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Conference or Workshop Item

3

An area and energy efficient inner-product processor for serial-link bus architecture

An area and energy efficient inner-product processor for serial-link bus architecture

由 Meher, Manas Ranjan, Jong, Ching Chuen, Chang, Chip Hong
出版 2013

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Article