MODELLING AND SIMULATION OF 2-BIT SONOS NONVOLATILE MEMORY

Moore's Law is the result of observations made in 1965 by Gordon Moore who said that the number of transistors on integrated circuits (ICs) doubled every 2 years. The law becomes the standard for the development and growth of chip technology. At that time, Moore predicted that this trend would...

Full description

Saved in:
Bibliographic Details
Main Author: Mochamad Rifqie, Dary
Format: Theses
Language:Indonesia
Online Access:https://digilib.itb.ac.id/gdl/view/46317
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Institut Teknologi Bandung
Language: Indonesia
id id-itb.:46317
spelling id-itb.:463172020-03-02T08:17:53ZMODELLING AND SIMULATION OF 2-BIT SONOS NONVOLATILE MEMORY Mochamad Rifqie, Dary Indonesia Theses 2-Bit, Memory, Nonvolatile, SONOS INSTITUT TEKNOLOGI BANDUNG https://digilib.itb.ac.id/gdl/view/46317 Moore's Law is the result of observations made in 1965 by Gordon Moore who said that the number of transistors on integrated circuits (ICs) doubled every 2 years. The law becomes the standard for the development and growth of chip technology. At that time, Moore predicted that this trend would continue in the future. However, the development of IC technology is experiencing considerable obstacles because the size of a chip is nearing the size of an atom, where at that size the phenomenon of quantum mechanics has been felt. Therefore, it takes the techniques to develop a new chip so that components such as processors, memory, sensors and others develop. The proposed development is assessed in terms of speed, power consumption and size, although in terms of size it is predicted to one day be stopped. In this research, a technique for developing a nonvolatile memory chip is proposed in which the structure and way of working is based on how the MOSFET works. The capacity of a memory itself is measured by how much data can be stored in that memory. By predicting the size of a MOSFET transistor itself will stop, then the addition of a memory capacity will one day affect the size of the memory chip. Thus, this study aims to increase the capacity of a memory without increasing its size. The proposed development technique is at the device level where each cell in memory is capable of storing 2 bits of data. The focus of this research is the simulation and modeling of nonvolatile memory with SONOS (semiconductor-oxide-nitide-oxide-semiconductor) structures with the ability to store 2-bit data per device. The process of this research includes several things including determining the geometrical structure and dimensions of the SONOS device to be simulated, analyzing the character of the SONOS device, determining the program and read mechanism, as well as the experiment of determining the voltage and operating time when the program and read conditions are simulated, where it aims to obtain optimal model. The SONOS divation simulation was carried out on Synopsis technology CAD software. text
institution Institut Teknologi Bandung
building Institut Teknologi Bandung Library
continent Asia
country Indonesia
Indonesia
content_provider Institut Teknologi Bandung
collection Digital ITB
language Indonesia
description Moore's Law is the result of observations made in 1965 by Gordon Moore who said that the number of transistors on integrated circuits (ICs) doubled every 2 years. The law becomes the standard for the development and growth of chip technology. At that time, Moore predicted that this trend would continue in the future. However, the development of IC technology is experiencing considerable obstacles because the size of a chip is nearing the size of an atom, where at that size the phenomenon of quantum mechanics has been felt. Therefore, it takes the techniques to develop a new chip so that components such as processors, memory, sensors and others develop. The proposed development is assessed in terms of speed, power consumption and size, although in terms of size it is predicted to one day be stopped. In this research, a technique for developing a nonvolatile memory chip is proposed in which the structure and way of working is based on how the MOSFET works. The capacity of a memory itself is measured by how much data can be stored in that memory. By predicting the size of a MOSFET transistor itself will stop, then the addition of a memory capacity will one day affect the size of the memory chip. Thus, this study aims to increase the capacity of a memory without increasing its size. The proposed development technique is at the device level where each cell in memory is capable of storing 2 bits of data. The focus of this research is the simulation and modeling of nonvolatile memory with SONOS (semiconductor-oxide-nitide-oxide-semiconductor) structures with the ability to store 2-bit data per device. The process of this research includes several things including determining the geometrical structure and dimensions of the SONOS device to be simulated, analyzing the character of the SONOS device, determining the program and read mechanism, as well as the experiment of determining the voltage and operating time when the program and read conditions are simulated, where it aims to obtain optimal model. The SONOS divation simulation was carried out on Synopsis technology CAD software.
format Theses
author Mochamad Rifqie, Dary
spellingShingle Mochamad Rifqie, Dary
MODELLING AND SIMULATION OF 2-BIT SONOS NONVOLATILE MEMORY
author_facet Mochamad Rifqie, Dary
author_sort Mochamad Rifqie, Dary
title MODELLING AND SIMULATION OF 2-BIT SONOS NONVOLATILE MEMORY
title_short MODELLING AND SIMULATION OF 2-BIT SONOS NONVOLATILE MEMORY
title_full MODELLING AND SIMULATION OF 2-BIT SONOS NONVOLATILE MEMORY
title_fullStr MODELLING AND SIMULATION OF 2-BIT SONOS NONVOLATILE MEMORY
title_full_unstemmed MODELLING AND SIMULATION OF 2-BIT SONOS NONVOLATILE MEMORY
title_sort modelling and simulation of 2-bit sonos nonvolatile memory
url https://digilib.itb.ac.id/gdl/view/46317
_version_ 1822927321828425728