Statistical process modelling for 32nm high-K/metal gate PMOS device
The evolution of MOSFET technology has been governed solely by device scaling, delivered an ever-increasing transistor density through Moore's Law. In this paper, the design, fabrication and characterization of 32nm HfO2/TiSi2 PMOS device is presented; replacing the conventional SiO2 dielectric...
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| Main Authors: | , , , , , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Published: |
Institute of Electrical and Electronics Engineers Inc.
2023
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| Institution: | Universiti Tenaga Nasional |