Statistical process modelling for 32nm high-K/metal gate PMOS device

• Main Authors: Maheran A.H.A., Noor Faizah Z.A., Menon P.S., Ahmad I., Apte P.R., Kalaivani T., Salehuddin F.
• Other Authors: 36570222300
• Format: Conference Paper
• Published: Institute of Electrical and Electronics Engineers Inc. 2023
• Institution: Universiti Tenaga Nasional

The evolution of MOSFET technology has been governed solely by device scaling, delivered an ever-increasing transistor density through Moore's Law. In this paper, the design, fabrication and characterization of 32nm HfO2/TiSi2 PMOS device is presented; replacing the conventional SiO2 dielectric...