Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method
Analysis of variance (ANOVA); Electron beam lithography; Metals; MOS devices; Oxide semiconductors; Taguchi methods; ATHENA; ATLAS; Electrical characteristic; Electronics technology; International Technology Roadmap for Semiconductors; MOS-FET; Simulation and optimization; Taguchi optimization metho...
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Institute of Electrical and Electronics Engineers Inc.
2023
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my.uniten.dspace-236632023-05-29T14:50:51Z Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method Mah S.K. Ahmad I. Ker P.J. Tan K.P. Faizah Z.A.N. 57191706660 12792216600 37461740800 57204581058 56395444600 Analysis of variance (ANOVA); Electron beam lithography; Metals; MOS devices; Oxide semiconductors; Taguchi methods; ATHENA; ATLAS; Electrical characteristic; Electronics technology; International Technology Roadmap for Semiconductors; MOS-FET; Simulation and optimization; Taguchi optimization method; MOSFET devices The developments in electronics technology push the invention of Metal Oxide Semiconductor Field Effect Transistor (MOSFET) towards smaller physical dimension with improvements in both quality and performance. In this paper, design, fabrication and simulation of electrical characteristics of 14nm La2O3/WSi2NMOS is presented. The fabrication and simulation process of device were performed by using Virtual Wafer Fabrication (VWF) Silvaco TCAD Tools, which consists of ATHENA and ATLAS. The designed device was optimized using Taguchi Method that involves orthogonal arrays and analysis of variance (ANOVA). The original results before optimization process for VTHis 0.212648V (7.5% lower than the targeted value) and IOFF is 3.73851�10-9 A/?m while the optimized results for VTH is 0.233321 V (1.44 % higher than the targeted value) and IOFFis 4.732375�10-11 A/?m which fulfilled the targets based on International Technology Roadmap for Semiconductors (ITRS) 2013. The Taguchi optimization method yields a significantly lower IOFF with an improved ION/IOFF ratio by a factor of 25. � 2018 IEEE. Final 2023-05-29T06:50:51Z 2023-05-29T06:50:51Z 2018 Conference Paper 10.1109/SMELEC.2018.8481293 2-s2.0-85056258752 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85056258752&doi=10.1109%2fSMELEC.2018.8481293&partnerID=40&md5=f1f779dfeebb3a2123e1c26b69f3267e https://irepository.uniten.edu.my/handle/123456789/23663 2018-August 8481293 275 278 Institute of Electrical and Electronics Engineers Inc. Scopus |
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| description |
Analysis of variance (ANOVA); Electron beam lithography; Metals; MOS devices; Oxide semiconductors; Taguchi methods; ATHENA; ATLAS; Electrical characteristic; Electronics technology; International Technology Roadmap for Semiconductors; MOS-FET; Simulation and optimization; Taguchi optimization method; MOSFET devices |
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57191706660 |
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57191706660 Mah S.K. Ahmad I. Ker P.J. Tan K.P. Faizah Z.A.N. |
| format |
Conference Paper |
| author |
Mah S.K. Ahmad I. Ker P.J. Tan K.P. Faizah Z.A.N. |
| spellingShingle |
Mah S.K. Ahmad I. Ker P.J. Tan K.P. Faizah Z.A.N. Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method |
| author_sort |
Mah S.K. |
| title |
Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method |
| title_short |
Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method |
| title_full |
Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method |
| title_fullStr |
Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method |
| title_full_unstemmed |
Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method |
| title_sort |
modeling, simulation and optimization of 14nm high-k/metal gate nmos with taguchi method |
| publisher |
Institute of Electrical and Electronics Engineers Inc. |
| publishDate |
2023 |
| _version_ |
1806427490837594112 |