Statistical optimization of process parameters for threshold voltage in 22 nm p-Type MOSFET using Taguchi method

by Maheran, A.H.A., Menon, P.S., Shaari, S., Ahmad, I., Faizah, Z.A.N.
Published 2017

Development of process parameters for 22 nm PMOS using 2-D analytical modeling

by Maheran, A.H.A., Menon, P.S., Ahmad, I., Shaari, S., Faizah, Z.A.N.
Published 2017

Statistical optimization of process parameters for threshold voltage in 22 nm p-Type MOSFET using Taguchi method

by Maheran A.H.A., Menon P.S., Shaari S., Ahmad I., Faizah Z.A.N.
Published 2023

Development of process parameters for 22 nm PMOS using 2-D analytical modeling

by Maheran A.H.A., Menon P.S., Ahmad I., Shaari S., Faizah Z.A.N.
Published 2023

Modeling, simulation and optimization of 14nm high-K/metal gate NMOS with taguchi method

by Mah S.K., Ahmad I., Ker P.J., Tan K.P., Faizah Z.A.N.
Published 2023

Modeling of 14 nm gate length n-Type MOSFET

by Faizah, Z.A.N., Ahmad, I., Ker, P.J., Roslan, P.S.A., Maheran, A.H.A.
Published 2017

Modeling of 14 nm gate length n-Type MOSFET

by Faizah Z.A.N., Ahmad I., Ker P.J., Roslan P.S.A., Maheran A.H.A.
Published 2023

Effect of process parameter variability on the threshold voltage of downscaled 22nm PMOS using taguchi method

by Maheran, A.H.A., Menon, P.S., Shaari, S., Kalaivani, T., Ahmad, I., Faizah, Z.A.N., Apte, P.R.
Published 2017

Effect of process parameter variability on the threshold voltage of downscaled 22nm PMOS using taguchi method

by Maheran A.H.A., Menon P.S., Shaari S., Kalaivani T., Ahmad I., Faizah Z.A.N., Apte P.R.
Published 2023

Optimization of 10nm Bi-GFET Device for higher ION/IOFF ratio using Taguchi Method

by Roslan A.F., Kaharudin K.E., Salehuddin F., Zain A.S.M., Ahmad I., Faizah Z.A.N., Hazura H., Hanim A.R., Idris S.K., Zaiton A.M., Mohamad N.R., Hamid A.M.A.
Published 2023