Investigating The Effects Of Lead Forming Parameters On Intermetallic Layer Crack Using The Finite-Element Method

The lead trim-and-form process is important in the manufacturing of programmable logic devices, microprocessors, and memories. Normally, inspection of a chip package is performed in a lead inspection machine after the lead forming process to detect defects on the leads. One such defect is the lead i...

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Main Authors: Kok, Chee Kuang, J.W.C. Chin, M.M. Rajmohan, V.S.H. Yeo, Said, Md Radzai
格式: Article
語言:English
出版: springer 2012
在線閱讀:http://eprints.utem.edu.my/id/eprint/4147/1/ck.kok-10.1007_s11664-012-1918-8.pdf
http://eprints.utem.edu.my/id/eprint/4147/
https://link.springer.com/article/10.1007/s11664-012-1918-8
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機構: Universiti Teknikal Malaysia Melaka
語言: English
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總結:The lead trim-and-form process is important in the manufacturing of programmable logic devices, microprocessors, and memories. Normally, inspection of a chip package is performed in a lead inspection machine after the lead forming process to detect defects on the leads. One such defect is the lead intermetallic compound (IMC) crack, exhibiting itself as plating crack. In this study, IMC crack of package leads, which causes loose connection between the copper lead and the tin plating, was analyzed using the finite-element method. The simulation results were verified by matching the simulated and actual formed lead profile. Simulation results showed a strong correlation between IMC crack after forming and aging and high residual tensile strain induced during lead forming. A proposal was made to resolve the crack issue by performing design of experiment (DOE) to reduce the residual tensile strain of the lead upon forming. Three optimization parameters were chosen, namely the forming angle, the shank angle, and the pre-forming angle. It is shown that, with the optimized parameter setting, a reduction of the residual strain can be achieved, thus minimizing the risk of IMC crack.