Design and implementation of a 1 volt low dropout voltage regulator on a 0.180um CMOS process driving a clock circuit load

• Main Authors: Lim, Jacqueline Maye S., Maranan, Jian Ramark G., So, Austin G.
• Format: text
• Language: English
• Published: Animo Repository 2013
• Subjects: Voltage regulators Metal oxide semiconductors, Complementary; Engineering
• Online Access: https://animorepository.dlsu.edu.ph/etd_bachelors/11534
• Institution: De La Salle University

The main purpose of this research is to design a low dropout voltage regulator (LDO) on 0.18um CMOS process with a maximum dropout of 500mV at a maximum load current of 500uA current. The specifications of this block are based on its application to regulate the clock circuit of a smart wire chip, wh...