FPGA-based built-in self test for a 4-bit BCD adder

• Main Authors: Bergonio, Norwynn B., Halili, Rafael F., Lim, Maris Mei P., Santiago, Chelyne G.
• 格式: text
• 語言: English
• 出版: Animo Repository 2010
• 主題: Field programmable gate arrays; Digital integrated circuits; Electronic digital computers; Electronic circuits > Testing
• 在線閱讀: https://animorepository.dlsu.edu.ph/etd_bachelors/14693
• 機構: De La Salle University

In this paper, an FPGA-based built in self-test program for a 4-bit BCD adder is presented. The program can detect stuck at faults and bridging faults. The main components of the program include: circuit under test, main controller, test pattern generator, scan chain and the output response analyzer...