A development of burn-in self test capability for Intel flash memory devices
New generation of integrated circuits including Flash memories are getting more complex requiring a need for more stringent method of testing the functionality and reliability of these devices. The amount of test times involved and the accumulated through-put-time are gradually becoming a concern fo...
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| Format: | text |
| Language: | English |
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Animo Repository
1994
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| Online Access: | https://animorepository.dlsu.edu.ph/etd_masteral/1557 |
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| Institution: | De La Salle University |
| Language: | English |
| Summary: | New generation of integrated circuits including Flash memories are getting more complex requiring a need for more stringent method of testing the functionality and reliability of these devices. The amount of test times involved and the accumulated through-put-time are gradually becoming a concern for manufacturers. The current approach of test equipment manufactures is to develop parallel test capability of units. The latest generation of Flash memory test equipment are only capable of supporting eight-to-one device/equipment ratio. Test times are not doubling but are increasing exponentially, requiring a different approach in the way we do testing of integrated circuits. This paper utilizes the 28F016SA-16Meg, the densest Intel Flash memory available, in developing an alternative solution for parallel test capability. It shows the feasibility of developing firmware routines to support burn-in self test for the current generation of Intel Flash memories. The concept presented merge the advantage of both burn-in and parallel test. This combined testing results in the ability to utilize the burn-in oven as an alternative tester and taking advantage of its full parallel test capability. |
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