A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec

A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec

This thesis proposes to make a Synthesizable Verilog Hardware Description Language (HDL) model of an Adaptive Differential Pulse Code Modulation (ADPCM) codec. The ADPCM model is intended to be used for toll-quality speech compression and would be coded in Verilog HDL's Register Transfer Level...

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Bibliographic Details
Main Author: Yao, Stephen U.
Format: text
Language:English
Published: Animo Repository 1997
Subjects:
Pulse code modulation
Digital electronics
Verilog (Computer hardware description language)
Integrated circuits > Computer simulation
Engineering
Online Access:https://animorepository.dlsu.edu.ph/etd_masteral/1839
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Institution: De La Salle University
Language: English
id oai:animorepository.dlsu.edu.ph:etd_masteral-8677
record_format eprints
spelling oai:animorepository.dlsu.edu.ph:etd_masteral-86772021-02-09T08:29:25Z A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec Yao, Stephen U. This thesis proposes to make a Synthesizable Verilog Hardware Description Language (HDL) model of an Adaptive Differential Pulse Code Modulation (ADPCM) codec. The ADPCM model is intended to be used for toll-quality speech compression and would be coded in Verilog HDL's Register Transfer Level (RTL) for synthesizability. Synthesizability assures the designer of the implementability of the design. 1997-01-01T08:00:00Z text https://animorepository.dlsu.edu.ph/etd_masteral/1839 Master's Theses English Animo Repository Pulse code modulation Digital electronics Verilog (Computer hardware description language) Integrated circuits -- Computer simulation Engineering
institution De La Salle University
building De La Salle University Library
continent Asia
country Philippines
Philippines
content_provider De La Salle University Library
collection DLSU Institutional Repository
language English
topic Pulse code modulation
Digital electronics
Verilog (Computer hardware description language)
Integrated circuits -- Computer simulation
Engineering
spellingShingle Pulse code modulation
Digital electronics
Verilog (Computer hardware description language)
Integrated circuits -- Computer simulation
Engineering
Yao, Stephen U.
A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec
description This thesis proposes to make a Synthesizable Verilog Hardware Description Language (HDL) model of an Adaptive Differential Pulse Code Modulation (ADPCM) codec. The ADPCM model is intended to be used for toll-quality speech compression and would be coded in Verilog HDL's Register Transfer Level (RTL) for synthesizability. Synthesizability assures the designer of the implementability of the design.
format text
author Yao, Stephen U.
author_facet Yao, Stephen U.
author_sort Yao, Stephen U.
title A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec
title_short A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec
title_full A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec
title_fullStr A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec
title_full_unstemmed A synthesizable verilog model of an adaptive differential pulse code modulation (ADPCM) codec
title_sort synthesizable verilog model of an adaptive differential pulse code modulation (adpcm) codec
publisher Animo Repository
publishDate 1997
url https://animorepository.dlsu.edu.ph/etd_masteral/1839
_version_ 1772835879694368768

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