Wafer level silicon mould fabrication and imprinting of high density microstructures
Wafer level mould fabrication and its imprinting technology are of great interest for cost effective mass fabrication of nano or microsized patterns. Although the process for making a silicon mould involves only several steps such as photolithography, deep reactive ion etching (DRIE) and nanoimprint...
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sg-ntu-dr.10356-1011842020-03-07T13:57:26Z Wafer level silicon mould fabrication and imprinting of high density microstructures Wong, T. I. Ong, H. Y. Lu, H. J. Tse, M. S. Quan, C. G. Ng, S. H. Zhou, X. School of Electrical and Electronic Engineering A*STAR SIMTech DRNTU::Engineering::Electrical and electronic engineering Wafer level mould fabrication and its imprinting technology are of great interest for cost effective mass fabrication of nano or microsized patterns. Although the process for making a silicon mould involves only several steps such as photolithography, deep reactive ion etching (DRIE) and nanoimprinting, there are still many issues to be overcome in order to achieve uniformly imprinted patterns on the whole wafer. Taking a 4″ wafer full of high density 3 × 3 μm squares with a depth of 10 μm as an example, this paper investigates the pitfalls in silicon mould fabrication and imprinting, and provides feasible solutions as a good reference to researchers seeking to mass fabricate micron-sized patterns by thermal imprinting. 2013-10-23T08:08:52Z 2019-12-06T20:34:53Z 2013-10-23T08:08:52Z 2019-12-06T20:34:53Z 2013 2013 Journal Article Wong, T. I., Ong, H. Y., Lu, H. J., Tse, M. S., Quan, C. G., Ng, S. H., & Zhou, X. (2013). Wafer level silicon mould fabrication and imprinting of high density microstructures. Microelectronic engineering, 104, 64-68. 0167-9317 https://hdl.handle.net/10356/101184 http://hdl.handle.net/10220/16751 10.1016/j.mee.2012.11.011 en Microelectronic engineering |
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DRNTU::Engineering::Electrical and electronic engineering Wong, T. I. Ong, H. Y. Lu, H. J. Tse, M. S. Quan, C. G. Ng, S. H. Zhou, X. Wafer level silicon mould fabrication and imprinting of high density microstructures |
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Wafer level mould fabrication and its imprinting technology are of great interest for cost effective mass fabrication of nano or microsized patterns. Although the process for making a silicon mould involves only several steps such as photolithography, deep reactive ion etching (DRIE) and nanoimprinting, there are still many issues to be overcome in order to achieve uniformly imprinted patterns on the whole wafer. Taking a 4″ wafer full of high density 3 × 3 μm squares with a depth of 10 μm as an example, this paper investigates the pitfalls in silicon mould fabrication and imprinting, and provides feasible solutions as a good reference to researchers seeking to mass fabricate micron-sized patterns by thermal imprinting. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Wong, T. I. Ong, H. Y. Lu, H. J. Tse, M. S. Quan, C. G. Ng, S. H. Zhou, X. |
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Article |
author |
Wong, T. I. Ong, H. Y. Lu, H. J. Tse, M. S. Quan, C. G. Ng, S. H. Zhou, X. |
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Wong, T. I. |
title |
Wafer level silicon mould fabrication and imprinting of high density microstructures |
title_short |
Wafer level silicon mould fabrication and imprinting of high density microstructures |
title_full |
Wafer level silicon mould fabrication and imprinting of high density microstructures |
title_fullStr |
Wafer level silicon mould fabrication and imprinting of high density microstructures |
title_full_unstemmed |
Wafer level silicon mould fabrication and imprinting of high density microstructures |
title_sort |
wafer level silicon mould fabrication and imprinting of high density microstructures |
publishDate |
2013 |
url |
https://hdl.handle.net/10356/101184 http://hdl.handle.net/10220/16751 |
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1681035804771614720 |