IP-enabled C/C++ based high level synthesis : a step towards better designer productivity and design performance

Intellectual property (IP) core based design is an emerging design methodology to deal with increasing chip design complexity. C/C++ based high level synthesis (HLS) is also gaining traction as a design methodology to deal with increasing design complexity. In the work presented here, we present a d...

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Bibliographic Details
Main Authors: Sinha, Sharad, Srikanthan, Thambipillai
Other Authors: School of Computer Engineering
Format: Article
Language:English
Published: 2014
Subjects:
Online Access:https://hdl.handle.net/10356/102194
http://hdl.handle.net/10220/18835
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Institution: Nanyang Technological University
Language: English

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